Low-Power Embedded Processor

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Project Specification

Purpose:

 The purpose of this project is to create a low-power embedded processor.  Most of the components of the processor will be modeled using VHDL (VHSIC (Very High Speed Integrated Circuit) Hardware Description Language) and a full custom VLSI (Very Large Scale Integration) implementation will be realized.

Overview:

 Over the last few years portable mobile electronic devices have become very popular.  These devices include PDAs, cellular phones, portable music players and other such items.  Since all of these items are battery powered, one major requirement in designing these devices is low power usage. In most of these systems the processor is responsible for consuming a significant amount of power due to the fact that it contains a much larger number of switching transistors than the rest of the circuitry in the system.  Therefore, design of a low-power processor is essential for minimizing power consumption of these devices.  While lower power consumption could be achieved by improving transistor technology (low parasitic capacitance of transistors); some design decisions could also greatly help in reducing power usage.  Creating a full custom design will help to minimize the number of logic gates, and thus lead to lower switching activity in the processor which will reduce power consumption greatly.

Technical Specifications:

 Table 1 below shows the instruction set this processor will support.

 

Instruction

 

Description

Add

Addition

Addu

Unsigned addition

Addi

Addition (immediate)

Sub

Subtraction

Subu

Unsigned subtraction

Subi

Subtraction (immediate)

Mul

Multiplication

Muli

Multiplication (immediate)

Cmp

Compare

And

AND

Andi

AND (immediate)

Or

OR

Ori

OR (immediate)

Not

NOT

Xor

XOR

Sll

Logical shift left

Srl

Logical shift right

Sla

Arithmetic shift left

Sra

Arithmetic shift right

Lw

Load word

Sw

Store word

Mov

Move data between registers

Movi

Move data (immediate)

Beq

Branch if equal to 0

Bne

Branch if not equal to 0

Ba

Branch always

BL

Branch and Link

Nop

No operation

Table 1

  The block diagram below gives a high level structural overview of the processor.

 

 

Software Tools:

 Synopsys and Cadence tools will be used throughout the design process.

 

 Note: This document was modified on 10/26/03.

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Senior Design Project
Electrical and Computer Engineering
University of Connecticut


Last updated: 05/30/04.