Professor and Associate Head
Office: ITE 437
Phone: (860) 486-5047
- Ph.D Electrical Engineering, University of Illinois, 1996
- M.S. Electrical Engineering, University of Illinois, 1993
- S.B. Electrical Engineering, Massachusetts Institute of Technology, 1989
Clustered network storage and distributed file systems, parallel algorithms and distributed system architectures, reconfigurable computing, hardware security
- Institute of Electrical and Electronics Engineers (IEEE)
- Association for Computing Machinery (ACM)
Archival Technical Journal Publications:
- “ATTEST: ATTributes-based Extendable STorage,” (with S. Narayan),Journal of Systems and Software, vol. 83, no. 4, pp. 548-556, April 2010. doi:10.1016/j.jss.2009.10.034
- “RAID0.5: Design and Implementation of a Low Cost Disk Array Data Protection Architecture,” Journal of Supercomputing, vol. 46, no. 2, pp. 108-123, November 2008. doi:10.1007/s11227-007-0159-8
- “FPGA Based String Matching for Network Processing Applications,”Microprocessors and Microsystems, vol. 32, no. 4, pp. 210-222, June 2008. doi:10.1016/j.micpro.2007.11.001
Conference Proceedings & Other Publications:
- “Active Storage Networks for Accelerating K-Means Data Clustering,” (with J. Singaraju) in International Symposium on Applied Reconfigurable Computing, pp. 102-109, March 2011, doi:10.1007/978-3-642-19475-7_12.
- “Adaptive Load Balanced Routing for 2-Dilated Flattened Butterfly Switching Network“, (with A. Thamarakuzhi) in Proceedings of International Conference on Networks, Best Paper Award, pp. 139-144, January 2011.
- “Parallel data sort using networked FPGAs,” (with J. Singaraju) in Proceedings of International Conference on ReConFigurable Computing and FPGAs,pp. 214-219, December 2010, doi:10.1109/ReConFig.2010.85..
- “Design and Implementation of a Nonblocking 2-Dilated Flattened Butterfly Switching Network,” (with A. Thamarakuzhi) in Proceedings of IEEE Latin American Conference on Communications, September 2010,doi:10.1109/LATINCOM.2010.5641117.
- “Scaling the NetFPGA switch using Aurora over SATA,” (with A. Thamarakuzhi) in Proceedings of NetFPGA Developers Workshop, August 2010.
- “User space storage system stack modules with file level control,” (with S. Narayan and R.K. Mehta) in Annual Linux Symposium, pp. 189-196, July 2010.
- “I/O Characterization on a Parallel File System,” (with S. Narayan) inProceedings of International Symposium on Performance Evaluation of Computer and Telecommunication Systems, pp. 133-140, July 2010. ISBN 978-156555341-5
- “2-Dilated Flattened Butterfly: A Nonblocking Switching Network,” (with A. Thamarakuzhi) in Proceedings of International Conference on High Performance Switching and Routing, pp. 153-158, June 2010,doi:10.1109/HPSR.2010.5580266.
- “Uncovering errors: the cost of detecting silent data corruption,” (with S. Narayan, S. Lang, P. Carns, and R. Ross) in Proceedings of Petascale Data Storage Workshop, pp. 37-41, November 2009, doi:10.1145/1713072.1713083.
- “An Analysis of Resource Costs in a Public Computing Grid,” in Proceedings of International Parallel and Distributed Processing Symposium Workshop on Desktop Grids and Volunteer Computing Systems, May 2009,doi:10.1109/IPDPS.2009.5161131
Active Research Projects:
National Science Foundation, “REU Site: Trustable Computing Systems Research and Education,” $116,755, Feb 15, 2011 – Jan 31, 2012.
National Science Foundation, “Active Object Storage to Enable Scalable and Reliable Parallel File Systems,” $525,000, Aug 15, 2009 – Jul 31, 2012.
US Department of Education, “Graduate Assistance in Areas of National Need: Computer Systems Security,” (co-PIs: Y. Fei, A. Kiayias, Z. Shi, A. Shvartsman, M. Tehranipoor, B. Wang, L. Wang), $522,624, Aug. 15, 2009 – Aug. 14, 2012.
National Science Foundation, “CI-ADDO-NEW: Storage System Trace Collection,” $86,284, Aug. 1, 2009 – Jul 31, 2011.
- Program Committee, 2011 International Conference on Field-Programmable Technology
- Program Committee, 2011 Colloquium for Information Systems Security Education
- Program Committee, 2010 International Conference on Parallel Processing
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